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Andes RISC-V CON Hsinchu

03 June 2021

We are pleased to be participating in virtual Andes RISC-V CON Hsinchu which is being held online on 3 June 2021, from 13:00 to 17:30.


Andy Gothard – Senior Manager, Marketing Programs, Siemens
Thursday 3 June 14:30-14:50

This presentation looks at how Tessent™ Embedded Analytics is assisting Picocom in designing and optimizing its open RAN standard-compliant baseband SoCs and carrier-grade software products for 5G small cell infrastructure. It outlines some of the challenges of building and optimizing open RAN systems, introduces the Embedded Analytics architecture, and explains how such on-chip monitoring and analytics can be used throughout the product lifecycle – from system-on-chip (SoC) development, to network deployment.

For more information and to register your place, please visit the event website.

About the event

Open Source Instruction Set Architecture (ISA) RISC-V has emerged rapidly in recent years and has become a new generation of mainstream embedded processor technology, with a thriving ecosystem, especially suitable for emerging applications such as AI, IoT, 5G, etc.

This RISC-V CON webinar, which was changed to a webinar due to the outbreak, will share the latest developments in RISC-V and the practical application of RISC-V in all aspects, and invitementa, Siemens, Telink and other partners to share how to work together to establish the RISC-V ecosystem and improve the industrial chain, leading the RISC-V community to thrive.

Limited places, sign up fast! No replays are available after the live broadcast of this seminar.