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Future of System Semiconductors Seminar, Korea

30 May 2019 @ 12:00 pm-6:00 pm

UltraSoC CSO Aileen Ryan is looking forward to participating in the Future of System Semiconductors Seminar on RISC-V Design Methodology which is taking place in Gyeonggi-do, Korea, on 30th May 2019, 12:30pm – 6pm.

UltraSoC is co-hosting this RISC-V Seminar in Korea with Imperas, Andes and Coontec on the Methodology for Designing a RISC-V SoC.

This seminar will provide engineers with an overview of the steps needed to build a RISC-V based SoC, including processor design (custom instructions) and verification, processor and SoC debug, and software porting and bring up.  Examples of use cases will also be presented. Featured presenters will include Andes, Coontec, ETRI, Imperas, UltraSoC and other invited guests, plus demonstration and networking session to follow.

To arrange a meeting during the event, please email jo.windel@ultrasoc.com who would be pleased to arrange this.

For more information about the event, please visit the event website.

 

Details

Date:
30 May 2019
Time:
12:00 pm-6:00 pm
Event Tags:
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Website:
http://coontec.kr/index.php/2019/05/02/201904_2/