At Agile Analog, we fully understand the challenges facing the semiconductor industry. As SoCs and ASICs become more complex and reach higher levels of integration, the demand for analog IP is increasing. To address the diverse requirements of the wide range of applications being targeted, the number of silicon processes and process variants is also increasing. To date, analog design has always been a laborious and manually-intensive process, resulting in IP that is either very specific and costly to change, or one-size-fits-all IP that is inefficient on area and power. The lengthy design process also means availability of analog IP is restricted to a subset of silicon processes, forcing chip designers to choose a process that is not best suited to their application.
