CTO Gajinder Panesar looks ahead to the RISC-V Workshop in Chennai and the opportunity for India.

Last year, we suggested that there’s a growing appetite in China for RISC-V, a suggestion that has turned out to have been spot on.

On the 18th and 19th July, a RISC-V Workshop will be held at the India Institute of Technology Madras, in Chennai.  I’ll be presenting on the topic of: It’s not about the core: It’s about the system‘.

Why India, and what’s so exciting about the opportunity?
Well, India has a history of strong design capabilities – many of the world’s biggest chip companies have large engineering teams based there. More recently, these teams have started taking on increasing responsibility for innovation and design fundamentals – many are now working on core architecture. Some of the engineers, having spent time in the US or other parts of the world working in tier one semiconductor corporations, are heading back to India with an appetite to ‘design’ their own future.

So increasingly, the image within our industry of India as being simply a “job shop” is a false one. RISC-V presents a fresh opportunity to foster the huge talent pool and to benefit from India’s strong entrepreneurial spirit, without the technical baggage and cost burdens that come with traditional architectures.

The opportunity presented by RISC-V has been taken seriously in India for a few years already. So much so, that it has the backing of India’s Centre for Development of Advanced Computing (C-DAC), a branch of the country’s Ministry of Communications and Information Technology, which has designated RISC-V the nation’s processor architecture of choice.

The Shakti Processor Project is an ambitious effort from the Computer Sciences team at the Indian Institute of Technology, Madras (IIT), which, to further demonstrate their appetite for innovation, is also playing host to this month’s RISC-V Workshop.

The Shakti Project is working on a series of six RISC-V cores, ranging from IoT up to high-end server applications. Perhaps seeing what start-ups in other parts of the world are up to (such as Esperanto, employing thousands of RISC-V cores to build ambitious AI supercomputer chips) may fuel the appetite of India’s experienced design talent to target some of these more ‘sophisticated’ opportunities with huge potential, as well as some of the lower hanging fruit.

The RISC-V opportunity for India’s design talent is not just about cost; importantly it’s also about autonomy and control. If these design teams are to go it alone and create successful chip design start-ups, it’s crucial they don’t have to dance to the tune of global design teams or the established processor hegemony. That’s why an open source architecture such as RISC-V makes sense, and why we expect to see a lot of activity coming out of India in the next few years.

If you’re attending the RISC-V Workshop in Chennai and want to hear about UltraSoC’s work in RISC-V, and in enabling its ecosystem via its platform-agnostic embedded analytics solutions, visit our event page or contact jo.windel@ultrasoc.com to arrange a meeting.

To register to attend the event, please visit the event website.