by Jo Windel | 19 June 2019
Following our successful first RISC-V Meetup in Cambridge last November, we are pleased to invite you to join us at our second one on Wednesday 19th June 2019, which will take place at Westminster College, Cambridge, and will be hosted by UltraSoC and Imperas...
by Jo Windel | 20 November 2018
Join us for the first RISC-V Meetup in Cambridge, jointly hosted by UltraSoC and Imperas! The evening will start with some interesting talks, and then there will be some technology demonstrations and some networking over light refreshments. We are pleased that Graham...
by Annie Hudson | 16 October 2018
UltraDevelop 2 IDE integrates partner technology from Imperas and Percepio UltraSoC today announced UltraDevelop 2, a complete integrated development environment (IDE) that combines comprehensive debug, run control, and performance tuning with advanced visualization...
by Kevin McDermott | 06 September 2018
Kevin McDermott is VP Marketing with Imperas We recently experienced the excitement and extent of the ‘Embedded Revival’ for new market opportunities at both the 55th Design Automation Conference (DAC) in June, in San Francisco, and the RISC-V Workshop in July in...
by Annie Hudson | 21 June 2018
Advanced debug environment for multicore processor designs used for both hardware and simulation UltraSoC and Imperas today announced a wide-ranging partnership that will provide developers of multicore systems on chip (SoCs) with a powerful combination of embedded...
