by Jo Windel | 01 September 2021
Join Siemens Fellow Gajinder Panesar, Groq, Hewlett Packard Enterprise and Mythic on Wednesday 1 September for a discussion on ‘Building AI Chips that Deliver’ at 10am PDT. As AI & ML chips proliferate, the focus is moving to deployment and practical...
by Jo Windel | 08 July 2021
Please join us on Thursday 8 July at 4pm UTC+1 / 8am PST to find out how companies developing complex AI / ML SoCs can deploy functional data and analytics to meet demanding chip performance targets and validation schedules. Click to register your place Hosted...
by Jo Windel | 03 June 2021
We are pleased to be participating in virtual Andes RISC-V CON Hsinchu which is being held online on 3 June 2021, from 13:00 to 17:30. ANALYTICS-BASED OPTIMIZATION FOR 5G OPEN RAN SOCS AND SYSTEMS Andy Gothard – Senior Manager, Marketing Programs, Siemens...
by Jo Windel | 08 December 2020
Join Tessent Embedded Analytics and our colleagues from the Mentor embedded software team at this year’s RISC-V Summit 2020, which is taking place online from 8th to 10th December 2020. We’ll be showcasing an online booth where you can interact with our...
by Jo Windel | 06 May 2020
Andes, Imperas, and UltraSoC hosted a webinar on how to easily optimize (including custom instructions and Vector, DSP extensions), accurately simulate, and precisely instrument, multicore RISC-V designs for AI Inferencing or ML applications. The webinar was run twice...
