Cambridge RISC-V Meetup

Join us for the first RISC-V Meetup in Cambridge, jointly hosted by UltraSoC and Imperas! The evening will start with some interesting talks, and then there will be some technology demonstrations and some networking over light refreshments. We are pleased that Graham...

Andes RISC-V Con Santa Clara

UltraSoC are pleased to be Bronze sponsor of the 2018 Andes RISC-V Con, which is taking place on Tuesday 13th November at the Hyatt Regency Santa Clara Hotel. RISC-V, an open instruction set architecture (ISA), has gained momentum and rapidly evolved into a new...
Imperas guest blog: RISC-V shines at DVCon Europe

Imperas guest blog: RISC-V shines at DVCon Europe

Kevin McDermott, VP Marketing with Imperas, attended DVCon Europe, where three RISC-V Foundation members give an introductory talk on the use of the industry’s leading open source instruction set architecture DVCon Europe has evolved to become the region’s...
The rising temperature of RISC-V in Bristol

The rising temperature of RISC-V in Bristol

Jo Windel, UltraSoC Marketing Manager, summarizes the first Bristol RISC-V Meetup It was with slight trepidation that we organized the first RISC-V Meetup last week, which took place at the venue Zero Degrees in Bristol. Obviously here at UltraSoC we are very aware...
RISC-V Day Tokyo

RISC-V Day Tokyo

Performance boost for RISC-V and winds of change in Japan’s business culture CEO Rupert Baines reports from Japan following his presentation at RISC-V Day Tokyo Japan’s technological innovation can never be called into question. But in terms of changes in big...