by Jo Windel | 08 December 2020
Join Tessent Embedded Analytics and our colleagues from the Mentor embedded software team at this year’s RISC-V Summit 2020, which is taking place online from 8th to 10th December 2020. We’ll be showcasing an online booth where you can interact with our...
by Jo Windel | 20 July 2020
UltraSoC participated in the RISC-V pavilion at Virtual DAC 2020, from 20th to 22nd July 2020. Click to visit our virtual exhibitor booth where you can still watch videos, as well as download documents and white papers. Hanan Moller, UltraSoC, Director, Customer...
by Jo Windel | 15 July 2020
Optimizing embedded RISC-V hardware/software development from virtual models to in-life silicon instrumentation Join this webinar with Andes, Imperas, and UltraSoC on the use of virtual platforms and FPGA’s for RISC-V multicore SoCs as early development platforms and...
by Jo Windel | 25 June 2020
UltraSoC CTO Gajinder Panesar is looking forward to participating in the Munich RISC-V virtual meetup on 25 June 2020, 4pm to 6pm CEST. Alongside other presenters that include Western Digital, he will present on ‘On-Chip Instrumentation – Debug & Trace, and...
by Andy Gothard | 19 May 2020
Yesterday was the 10th anniversary of RISC-V, ten years since a group first their put heads together and ultimately kicked-off a rethink of processor architectures via open standard collaboration. Interest in RISC-V built quickly around the world because it is a...
