Detect… understand… mitigate… cybersecurity at hardware speed

Tessent enables an entirely new level of cybersecurity protection for any product

Our solutions can detect, understand and mitigate cyber threats at hardware speed. Because they are embedded in the underlying hardware of the SoC, they are extremely difficult to subvert, providing an “anchor” for traditional root-of-trust security mechanisms. By monitoring the underlying behavior of the chip, they add an extra element of defense in depth to the security landscape, and can offer protection against “day zero” attacks.
You can read more about our cybersecurity and functional safety solutions here

Featured download

New white paper: Understanding the evolving landscape of SoC vulnerabilities and analog threats

SoC attacks call for analog and digital defences

This new white paper discusses the sources of vulnerabilities to cyber-attacks; where they are, what they can potentially achieve, as well as highlighting how attacks can happen and what infrastructure must be in place to monitor and tackle them.

Click to access the white paper

Who is responsible for securing the connected car?

Aileen Ryan blogs about the cybersecurity implications of increasing interconnectedness in the automotive industry
Read the blog on the Secure-CAV project website

A holistic cybersecurity infrastructure

Tessent Embedded Analytics continuously checks that your SoC is operating as expected. Our on-chip sentries can detect and block suspicious transactions at hardware speed. They are run-time configurable, allowing them to adapt to the evolving cyber threat landscape. Sentries can be integrated via a secure interconnect with other on-chip monitoring, analytics and recording elements. This improves cyber resilience by allowing designers to profile normal system behavior; analyze and understand existing and emerging cyber threats; improve anomaly detection; and capture a forensic record of unusual events.

Detect

Tessent’s on-chip monitors constantly gather targeted, fine-grained data to detect unusual behavior at hardware speed – working at the most fundamental level of system operation

Understand

Tessent gathers data from across the chip to profile normal operation of your system and analyze known and emerging cyber threats, using on-chip intelligence or analytics in the cloud

Protect

Tessent Sentries can protect the internal buses of any SoC, responding immediately by flagging or blocking suspicious transactions and isolating compromised execution units

Record

Tessent’s cybersecurity architecture allows forensic recording of critical or anomalous events, increasingly important to maintain safety and determine liability when things go wrong

Featured press release

UltraSoC and Canis Labs partner to secure the CAN bus

Hardware-based detection and mitigation of “the number one cybersecurity vulnerability in the automotive industry” UltraSoC and Canis Automotive Labs announced on 27 May 2020 a partnership that addresses one of the most serious cybersecurity vulnerabilities in the automotive industry: the lack of security features within the CAN bus, which is commonly used to interconnect in-vehicle systems such as brakes, steering, engine, airbags, door locks, and headlights. Click to read the full news announcement

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