USB debug communicator
Tessent’s USB Communicator IP allows on-chip debug resources to connect to a PC using standard USB cable, sharing the chip’s USB interface with system traffic and enabling high-speed debug access. The system is entirely hardware based (“bare metal”), requiring no processor or software stack, and so is completely non-intrusive and effective “from cycle zero” for bring-up.
Any system debug architecture must access the outside world for configuration and to output data. Traditionally, designers have relied on debug-specific interfaces – typically JTAG – for this purpose.
Tessent USB Communicator allows this to be done via an external interface – in this case USB – that is often already an intrinsic part of the device’s design.
This approach brings many benefits:
- Dedicated debug I/O pins are not required, saving packaging costs
- There is no need to purchase costly JTAG probes
- At 480Mbps via USB2.0, and even faster data rates with USB 3.x, the data rate is orders of magnitude faster than JTAG.
- The interface is available “from cycle zero”, allowing debug access before the main system OS has booted
The Tessent USB Communicator is delivered as silicon IP for integration into any chip design. It is backed with advanced security features such as challenge / response capability, cryptographic protection and the ability to completely disable the debug facility in field deployment.
“We’re expecting immediate gains from the ability to use on-chip USB as our primary debug interface, a simple change which saves us time and money, as well as providing data speeds more in keeping with our leading-edge low-power machine vision platform”: Brendan Barry, Vice President of Engineering, Movidius (now Intel)
Traditionally, SoC designers have relied on debug-specific interfaces – typically JTAG – to make debug interconnections to their SoCs. Tessent allows you to do this via an external USB interface that is already an intrinsic part of the device’s design.
The USB Communicator is delivered as silicon IP and provides high-speed communications with any standard debug software (for example Lauterbach or GDB). On the SoC side, it interfaces with a wide variety of on-chip debug structures, including JTAG, Nexus, and Arm CoreSight, as well as UltraSoC’s own processor-independent, system-level, non-intrusive debug architecture. It includes advanced security features such as challenge/response capability and cryptographic protection.
The Communicator can be directly connected to a USB PHY interface to enable a dedicated debug channel, or to the optional USB debug hub core, allowing sharing of the USB interface between debug and system traffic.
You can find out more about the USB Debug Communicator by downloading our product brief.